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cRIO-9118, 8-Slot, Legacy FPGA CompactRIO Chassis
National Instruments cRIO-9118 CompactRIO Chassis
The cRIO‑9118 (Part Numbers: 780920-01 and 780920-02) is a reconfigurable CompactRIO chassis designed to support C Series I/O modules and LabVIEW FPGA applications. To do this, the user should put the frame and the AI module into LabVIEW FPGA Interface mode. The user can utilize alternate modules in Scan Interface mode. The I/O point status markers on the modules are rationale side pointers. The LED shows the on or off status and mirrors the status of the point regarding the CPU. On a yield module, the status pointers could be working ordinarily while the genuine yield gadget (transistor, triac, and so on) could be harmed. With an info module, if the pointer LED is on, the information hardware ought to work appropriately. To confirm appropriate usefulness, verify that the LED goes off when the information flag is expelled.
The NI Scan Engine enables efficient, direct access to I/O channels by maintaining a memory map of data values, which are updated at a user-defined rate known as the scan period. The sweep time frame must incorporate the ideal opportunity for the output itself, as well as the ideal opportunity for the application rationale.
NI Scan Engine execution is essentially controlled by two key components. The principal component is the I/O Scan Thread: this is attached to equipment assets and is influenced by the type and number of C Series Modules utilized, if timestamps are gained, and different variables. The second component is the I/O Variable hub. This is attached to programming assets and is influenced by the quantity of hubs in a LabVIEW VI, how hubs are gotten to, and different variables.
| Model | cRIO-9118 |
|---|---|
| Manufacturer | National Instruments |
| Part Numbers | 780920-01, 780920-02 |
| Type | CompactRIO Chassis |
| Slots | 8 |
| FPGA | Virtex-5 LX110 |
| Number of Flip-flops | 69,120 |
| Embedded RAM | 4,608 kbits |
| Weight | 31 oz. |
| Power Consumption | 5,900 mW Maximum |
| Operating Temperature Range | -40 °C to 70 °C |
| Ingress Protection Rating | IP40 |
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National Instruments cRIO-9118 Frequently Asked Questions
Question: What is the total chassis power consumption of the cRIO-9118?
Answer: The total chassis power consumption of the cRIO-9118 is 5,900 mW.
Question: I am trying to get my NI cRIO-9118 FPGA design to compile for the target, but I’m getting an error saying, “Overuse of DSP blocks.”
Answer: If you are using the NI cRIO-9118 FPGA to compile for the target and are receiving the “overuse of DSP blocks,” the FPGA High Speed Math Multiplier must be set to LUT and not AUTO, as this will use DSP, and not AUTO to LUT if there is too few DSP's. This will lower DSP usage, but increase LUT use.
Question: How many FPGA multipliers does the cRIO 9118 have?
Answer: The cRIO-9118 has 64 FPGA DSP48 multipliers.
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