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July 2025
M8062A
Keysight/Agilent M8062A, 32 Gb/s, 8-Tap De-Emphasis Engine, BERT Front End
Actual item may vary if no part number is provided on quote request.
✔ 2 Year Warranty Included
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Andrew Gar**** Verified Buyer
" Amazing to work with and had my order within 1 week after purchasing with all NI certs and data that were needed. "
March 2025
Said Sai**** Verified Buyer
" Competent contact for highly specialized components. The support team is very knowledgeable. Many thanks for the help and the fast shipping! "
January 2025
Bob C**** Verified Buyer
" Jason was able to get our emergency situation taken care of quickly and professionally. "
May 2025
Gregg Flecki**** Verified Buyer
" Great service and great products. This is my 2nd time using Apex Waves, truly impressed. "
January 2025
Carol Zimme**** Verified Buyer
" Very responsive and helpful, competitive pricing. Good source! "
July 2025
Andrew Gar**** Verified Buyer
" Amazing to work with and had my order within 1 week after purchasing with all NI certs and data that were needed. "
March 2025
Said Sai**** Verified Buyer
" Competent contact for highly specialized components. The support team is very knowledgeable. Many thanks for the help and the fast shipping! "
January 2025
Bob C**** Verified Buyer
" Jason was able to get our emergency situation taken care of quickly and professionally. "
May 2025
Gregg Flecki**** Verified Buyer
" Great service and great products. This is my 2nd time using Apex Waves, truly impressed. "
January 2025
Keysight/Agilent M8062A BERT Front End
The Keysight/Agilent M8062A 32 Gb/s BERT Front End is a special-purpose front-end module designed to enhance the J-BERT M8020A Bit Error Ratio Tester's capabilities in terms of supporting lane speeds ranging from 25 Gb/s to 32.4 Gb/s. By virtue of its ability to perform complete receiver characterization and compliance testing on 100G-class serial data links, including those employing 100G SerDes with CAUI-4 interfaces, OIF CEI electrical interfaces, and backplane receivers compliant with IEEE 802.3 100GBASE-KR4 and 25GBASE-KR standards, this module will integrate an internally calibrated jitter source providing both Low Frequency Periodic Jitter (LFPJ), High Frequency Periodic Jitter (HF PJ), Clock/2, Burst Unit Jitter (BUJ), Run-In/Run-Out Jitter (RJ), and Spectral Spread (SSC), plus an eight-tap de-emphasis engine capable of providing up to 24 dB of signal conditioning to simulate a transmitter's de-emphasis or compensate for losses due to a test fixture.
Designed to provide precise stresses to devices being tested, the M8062A includes an electronic adjustable Inter-Symbol Interference (ISI) generator, which simulates different types of channel loss without requiring a manual swap out of cabling to do so, thereby dramatically reducing the time required to validate the equalization of the receiver. It also contains a built-in clock recovery and analyzer equalization function to ensure that error analyses remain valid regardless of whether there is some degree of eye closure introduced into the loopback path. The front end also includes two interference injection paths to inject common mode and differential mode signals from single-ended sources. The use of these interference injection paths reduces the complexity of test setups since they eliminate the need for separate power splitters.
In addition to all of the previously mentioned functions, additional features of the BERT front end include a clean clock output with selectable dividers and transmitter equalization negotiation functionality for 100GBASE-KR4 and 25GBASE-KR standards.
Applications for this BERT front end are typical of those found in optical transceivers for use in 100GBASE-SR4, LR4, and ER4 systems as well as 32G Fibre Channel, SAS 24G, Thunderbolt 3 at 20 Gb/s, and active optical cables. The inherent low random jitter and fast rise/fall times of the BERT front end ensure that bit error ratio measurements represent the true device under test performance instead of representing the limits imposed upon it by the test equipment. As such, the M8062A can be used as a field-upgradeable option to protect investments while providing the speed and stress capabilities necessary for emerging high-speed computer bus and data center networking standards.
| Model Name | M8062A |
|---|---|
| Part Type | 32Gb/s BERT Front End |
| Manufacturer | Keysight |
| Legacy Manufacturer | Agilent |
| Max Data Rate | 32.4 Gb/s |
| Jitter Injection | LFPJ, HF PJ, Clk/2, BUJ, RJ, SSC |
| De-Emphasis | 8 taps, 24 dB max |
| ISI Generator | Electronic, adjustable |
| Interference Injection | CM (post-ISI), DM (pre-ISI) |
| Clock Output | Clean, selectable dividers |
| Clock Recovery | Built-in, full-rate |
| Link Training | 100GBASE-KR4, 25GBASE-KR |
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