E2925A

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Keysight/Agilent E2925A, 33 MHz, 32 Bit, Built-in Protocol Observer, PCI Exerciser and Analyzer

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E2925A Keysight PCI Exerciser and Analyzer | Request a Quote | Image
E2925A Keysight PCI Exerciser and Analyzer | Request a Quote | Image
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Keysight/Agilent E2925A PCI Exerciser and Analyzer

The Keysight E2925A is a complete programmable PCI master and target board for the purpose of validating 32-bit, 33 MHz PCI products and systems. It includes an onboard logic analyzer, which will capture up to 32 k-states of all PCI signals along with internal state machine output. The logic analyzer also has a protocol observer built-in that continually checks 25 different rules per PCI specification version 2.1 and reports on the fly if there are any violations.

A user may create complex bus traffic scenarios using a variety of techniques, such as defining what length of burst he wants his master to perform (burst length), how long he wants him to wait before sending another cycle (wait states), how he wants the target to terminate each cycle (termination type), and even define where he wants to inject a parity error or system error to test for robust error recovery. In addition, it contains the following on-board resources: 128 kB of memory that can be mapped into either PCI memory space or I/O space; mirroring can be defined to allow simulation of much larger areas than provided; and a 64 kB expansion EEPROM. There are five programmable target decoders available to support address mapping for memory, I/O, configuration cycles, and the expansion ROM.

Optional Windows-based GUIs for the E2925A provide users with improved graphical interfaces to use when performing interactive debugging and analysis. The E2970A Analyzer GUI provides control over the logic analyzer triggering and sampling criteria. The E2971A Exerciser GUI allows users to configure both master- and target-side protocols without having to write code. The E2972A Performance Analyzer GUI provides users with tools to collect and display various metrics, including throughput and latency. The E2974A subsystem stress test library is a collection of predefined tests designed to stress PCI subsystems during platform validation. Finally, the E2975A Protocol Permutator and Randomizer Library creates systematic permutations of protocol data to help identify "corner case" problems.

All of these tools communicate directly with the card via a comprehensive C-API over RS232, PCI, or bi-directional Centronics, allowing for direct integration into automated test environments. Additionally, this product offers an optional 64-branch trigger sequencer to create complex event-driven captures and a self-contained four-slot PCI backplane with dedicated arbitration and clock distribution for benchtop timing measurement. These features enable faster design bring-up, debugging of protocols, and validation of PCI chips, cards, and systems.

Model Name Keysight/Agilent E2925A
Part Type PCI Exerciser & Analyzer Card
PCI Bus 32-bit/33 MHz master/target, programmable config space
Analyzer Depth 32k state (1M opt.), all PCI & state signals
Protocol Checker 25 PCI 2.1 rules, real-time checking
Onboard Memory 128 kB PCI memory/I/O, mirroring support
Target Decoders 5 decoders: mem 4 kB–16 MB, I/O 16 B–64 kB, regs, ROM, config
Expansion EEPROM 64 kB for option ROM/config data
Error & Traffic Control Burst, wait, termination control; parity/SERR injection
Host Interfaces & API C-API, RS232, PCI, bidirectional Centronics

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