E2930A

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Keysight/Agilent E2930A, 4 MB Onboard Memory, Exerciser and Protocol Analyzer for PCI-X 1.0 and 2.0

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Keysight Agilent HP - Protocol Analyzers and Exercisers - E2930A
Keysight Agilent HP - Protocol Analyzers and Exercisers - E2930A - Wiring
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Keysight/Agilent E2930A Exerciser and Protocol Analyzer for PCI-X 1.0 and 2.0

The E2930A from Keysight (originally from Agilent) is a module that is designed as a PCI-X exerciser/protocol analyzer. It has been developed to perform rigorous validation on high-speed I/O buses found in servers, motherboards, chipsets, RAID systems, and NICs in accordance with both PCI-X specifications 1.0 & 2.0, as well as Mode 2 double data rate transfers at speeds up to 200 MT/sec. The small form factor E2930A is plugged directly into the DUT and offers all three functions of an integrated protocol checker, state analyzer, and bus exerciser. Therefore, it is suitable for R&D and QA departments to use one tool for their entire validation process.

The exerciser function of the E2930A allows users to fully emulate a bus master or target, utilizing its built-in 4MB of data memory (512Kx64), which supports split transactions and contains a real-time pattern generator to assist with BIOS testing, corner case stress, and error recovery validation. Additionally, the analyzer function can capture bus activity and utilize a 4 million state trace depth to present address, data, and control phase information to allow for root cause analysis. All PCI-X protocols are monitored by over 64 rules, and violations such as termination, parity errors, and split completion will be reported immediately. To further ensure no "hidden" defects exist within these complex transaction sequences, the Keysight/Agilent E2930A utilizes the patented integrated Protocol Permutator and Randomizer technologies.

Utilizing 64-bit data and address capabilities, the E2930A verifies unidirectional data paths in real time as well as compares data in real time to verify signal and data integrity. In addition, the analyzer measures performance characteristics such as bus usage, latency, and throughput bottlenecks. Options available for controlling the E2930A include a graphical user interface, a C API for automated scripting and TCL shell, along with a USB 2.0 connection for communication with other devices. A system validation pack is also available and includes server, motherboard, chipset, and RAID controller compliance tests. The ability of the exerciser and analyzer to work together in conjunction enables the introduction of controlled deterministic errors into the DUT while allowing for observation of how the system responds to said errors. This type of evaluation will reveal subtle protocol defects prior to shipping the product. These two tools collectively provide a development platform for evaluating PCI-X-DDR designs, thus reducing debugging cycle times.

E2930A Technical Specifications
ModelE2930A
Part TypePCI-X DDR Exerciser & Protocol Analyzer
ManufacturerKeysight
Legacy ManufacturerAgilent
Supported StandardsPCI-X 1.0 and 2.0 (Mode 1; Mode 2)
Maximum Data RateUp to 200 MT/s (DDR)
Data Width64-bit data and addressing
Exerciser CapabilityProgrammable traffic generation & response
Onboard Memory4 MB data memory (512K × 64-bit)
Analyzer Trace Depth4M state trace memory
Protocol Checking64+ real-time PCI-X rule checks
ConnectivityUSB 2.0 and in-system PCI-X control

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